On Sat, May 20, 2023 at 04:17:53PM +0100, Jonathan Cameron wrote:
> On Fri, 19 May 2023 19:29:15 +0100
> Conor Dooley <conor@xxxxxxxxxx> wrote:
>
> > Hey Marius,
> >
> > On Fri, May 19, 2023 at 07:01:44PM +0300, marius.cristea@xxxxxxxxxxxxx wrote:
> > > From: Marius Cristea <marius.cristea@xxxxxxxxxxxxx>
> > >
> > > This is the device tree schema for iio driver for
> > > Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> > > Delta-Sigma ADCs with an SPI interface.
> >
> > Just one quick process bit, please try to CC all of the maintainers
> > listed by get_maintainer.pl - you unfortunately managed to miss 2 of the
> > 3 dt-binding maintainers :/ Perhaps you ran get_maintainer.pl using our
> > vendor tree?
> >
> > > Signed-off-by: Marius Cristea <marius.cristea@xxxxxxxxxxxxx>
> > > ---
> >
> > > + vref-supply:
> > > + description:
> > > + Some devices have a specific reference voltage supplied on a different
> > > + pin to the other supplies. Needed to be able to establish channel scaling
> > > + unless there is also an internal reference available (e.g. mcp3564r)
> >
> > Should this be marked as a required property for the non-r devices that
> > do not have an internal reference?
> >
> > > + microchip,hw-device-address:
> >
> > Hopefully Rob or Jonathan etc can chime in as to whether a common
> > property exists for this type of thing...
> >
> Nope. This is a new one for me - there are devices that work on a daisy chain
> principle but I think this one works by encoding stuff in the actual message
> which is unusual for SPI.
Not something I've seen either.
>
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > + minimum: 0
> > > + maximum: 3
> > > + description:
> > > + The address is set on a per-device basis by fuses in the factory,
> > > + configured on request. If not requested, the fuses are set for 0x1.
> > > + The device address is part of the device markings to avoid
> > > + potential confusion. This address is coded on two bits, so four possible
> > > + addresses are available when multiple devices are present on the same
> > > + SPI bus with only one Chip Select line for all devices.
What's this going to look like with more than one device? It would need
to be incorporated into 'reg' and the unit-address to work. Something
like this is
spi {
device0@0 {
reg = <0>;
microchip,hw-device-address = <0>;
};
device1@0 {
reg = <0>;
microchip,hw-device-address = <1>;
};
};
That should throw warnings because you have 2 nodes at the same address
which is not good practice.
I think you need a spi mux in here with the mux addresses being the
microchip,hw-device-address values.
Rob
