Hi Arseniy, avkrasnov@xxxxxxxxxxxxxx wrote on Wed, 7 Jun 2023 12:04:29 +0300: > On 07.06.2023 12:08, Krzysztof Kozlowski wrote: > > On 07/06/2023 10:57, Arseniy Krasnov wrote: > >> > >> > >> On 07.06.2023 11:53, Krzysztof Kozlowski wrote: > >>> On 07/06/2023 10:40, Arseniy Krasnov wrote: > >>>> Hello Miquel, > >>>> > >>>> On 07.06.2023 10:58, Miquel Raynal wrote: > >>>> > >>>>> Hi Arseniy, > >>>>> > >>>>> AVKrasnov@xxxxxxxxxxxxxx wrote on Tue, 6 Jun 2023 22:35:07 +0300: > >>>>> > >>>>>> Add description of 'nand-rb' property. Use "Fixes" because this property > >>>>>> must be supported since the beginning. For this controller 'nand-rb' is > >>>>>> stored in the controller node (not in chip), because it has only single > >>>>>> r/b wire for all chips. > >>>>> > >>>>> Sorry if I mislead you in the first place, but you could definitely > >>>>> have two chips and only one with RB wired. It needs to be defined in > >>>>> the chips. > >>>> > >>>> Ok, so to clarify: is it ok, that in bindings this property will be placed in the > >>>> chip, but in driver, i'm trying to read it from the controller node (thus in > >>>> dts file it will be also in controller node)? The bindings and your driver internal representation are two different things. Anyway, as mentioned above, wiring the RB line to one die and not the other would be valid hardware design and would require the rb property to be in the chip node. Please perform a per-chip property read in the driver as well. > >>> > >>> No, because how would your DTS pass validation? I understand you did not > >>> test the bindings, but this will improve, right? > >> > >> Ok, i'll follow DTS layout in the driver, "test the bindings" You mean "make dt_binding_check"? > > > > Yes. They were sent without testing. > > > > But please also test your DTS with dtbs_check. > > Got it! > > Thanks, Arseniy > > > > > > > Best regards, > > Krzysztof > > Thanks, Miquèl
