On 23-06-01 14:22:35, Konrad Dybcio wrote:
>
>
> On 1.06.2023 14:00, Abel Vesa wrote:
> > The USB HCs nodes are missing the interconnect paths, so add them.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > index e5c60a6e4074..eefd3dcbb2e1 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > @@ -3750,6 +3750,10 @@ usb_1: usb@a6f8800 {
> >
> > resets = <&gcc GCC_USB30_PRIM_BCR>;
> >
> > + interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
> > + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
> You need to update #interconnect-cells to 2.
Ugh, missed that. Will send a new version.
Thanks,
Abel
>
> Konrad
> > + interconnect-names = "usb-ddr", "apps-usb";
> > +
> > usb_1_dwc3: usb@a600000 {
> > compatible = "snps,dwc3";
> > reg = <0 0x0a600000 0 0xcd00>;
> > @@ -3810,6 +3814,10 @@ usb_2: usb@a8f8800 {
> >
> > resets = <&gcc GCC_USB30_SEC_BCR>;
> >
> > + interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
> > + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
> > + interconnect-names = "usb-ddr", "apps-usb";
> > +
> > usb_2_dwc3: usb@a800000 {
> > compatible = "snps,dwc3";
> > reg = <0 0x0a800000 0 0xcd00>;
