The DP output is shared with the USB3 SuperSpeed lanes and is usually connected to an USB-C port which Altmode is controlled by the PMIC Glink infrastructure. DT changes tying the DP controller to the USB-C port on the QRD board will be sent later. Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> --- Changes in v2: - Added review tags - s/lov_svs/low_svs/ - Applied fixes suggested from Konrad - Link to v1: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-dp-v1-0-29efe2689553@xxxxxxxxxx --- Neil Armstrong (3): dt-bindings: display: msm: dp-controller: document SM8550 compatible arm64: dts: qcom: sm8550: fix low_svs RPMhPD labels arm64: dts: qcom: sm8550: add display port nodes .../bindings/display/msm/dp-controller.yaml | 1 + arch/arm64/boot/dts/qcom/sm8550.dtsi | 95 ++++++++++++++++++++-- 2 files changed, 91 insertions(+), 5 deletions(-) --- base-commit: d4cee89031c80066ec461bb77b5e13a4f37d5fd2 change-id: 20230601-topic-sm8550-upstream-dp-b713ba275d7c Best regards, -- Neil Armstrong <neil.armstrong@xxxxxxxxxx>
