On 31.05.2023 03:16, Dmitry Baryshkov wrote:
> Currently in board files MDSS and DSI nodes stay apart, because labels
> for DSI nodes do not have the mdss_ prefix. It was found that grouping
> all display-related notes is more useful.
>
> To keep all display-related nodes close in the board files, change DSI
> node labels from dsi_* to mdss_dsi_*.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> arch/arm64/boot/dts/qcom/msm8953.dtsi | 40 +++++++++++++--------------
> 1 file changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
> index 7d193a467819..b711cf9a6dc0 100644
> --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
> @@ -766,10 +766,10 @@ gcc: clock-controller@1800000 {
> #power-domain-cells = <1>;
> clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
> <&sleep_clk>,
> - <&dsi0_phy 1>,
> - <&dsi0_phy 0>,
> - <&dsi1_phy 1>,
> - <&dsi1_phy 0>;
> + <&mdss_dsi0_phy 1>,
> + <&mdss_dsi0_phy 0>,
> + <&mdss_dsi1_phy 1>,
> + <&mdss_dsi1_phy 0>;
> clock-names = "xo",
> "sleep",
> "dsi0pll",
> @@ -851,20 +851,20 @@ ports {
> port@0 {
> reg = <0>;
> mdp5_intf1_out: endpoint {
> - remote-endpoint = <&dsi0_in>;
> + remote-endpoint = <&mdss_dsi0_in>;
> };
> };
>
> port@1 {
> reg = <1>;
> mdp5_intf2_out: endpoint {
> - remote-endpoint = <&dsi1_in>;
> + remote-endpoint = <&mdss_dsi1_in>;
> };
> };
> };
> };
>
> - dsi0: dsi@1a94000 {
> + mdss_dsi0: dsi@1a94000 {
> compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
> reg = <0x01a94000 0x400>;
> reg-names = "dsi_ctrl";
> @@ -874,8 +874,8 @@ dsi0: dsi@1a94000 {
>
> assigned-clocks = <&gcc BYTE0_CLK_SRC>,
> <&gcc PCLK0_CLK_SRC>;
> - assigned-clock-parents = <&dsi0_phy 0>,
> - <&dsi0_phy 1>;
> + assigned-clock-parents = <&mdss_dsi0_phy 0>,
> + <&mdss_dsi0_phy 1>;
>
> clocks = <&gcc GCC_MDSS_MDP_CLK>,
> <&gcc GCC_MDSS_AHB_CLK>,
> @@ -890,7 +890,7 @@ dsi0: dsi@1a94000 {
> "pixel",
> "core";
>
> - phys = <&dsi0_phy>;
> + phys = <&mdss_dsi0_phy>;
>
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -903,20 +903,20 @@ ports {
>
> port@0 {
> reg = <0>;
> - dsi0_in: endpoint {
> + mdss_dsi0_in: endpoint {
> remote-endpoint = <&mdp5_intf1_out>;
> };
> };
>
> port@1 {
> reg = <1>;
> - dsi0_out: endpoint {
> + mdss_dsi0_out: endpoint {
> };
> };
> };
> };
>
> - dsi0_phy: phy@1a94400 {
> + mdss_dsi0_phy: phy@1a94400 {
> compatible = "qcom,dsi-phy-14nm-8953";
> reg = <0x01a94400 0x100>,
> <0x01a94500 0x300>,
> @@ -934,7 +934,7 @@ dsi0_phy: phy@1a94400 {
> status = "disabled";
> };
>
> - dsi1: dsi@1a96000 {
> + mdss_dsi1: dsi@1a96000 {
> compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
> reg = <0x01a96000 0x400>;
> reg-names = "dsi_ctrl";
> @@ -944,8 +944,8 @@ dsi1: dsi@1a96000 {
>
> assigned-clocks = <&gcc BYTE1_CLK_SRC>,
> <&gcc PCLK1_CLK_SRC>;
> - assigned-clock-parents = <&dsi1_phy 0>,
> - <&dsi1_phy 1>;
> + assigned-clock-parents = <&mdss_dsi1_phy 0>,
> + <&mdss_dsi1_phy 1>;
>
> clocks = <&gcc GCC_MDSS_MDP_CLK>,
> <&gcc GCC_MDSS_AHB_CLK>,
> @@ -960,7 +960,7 @@ dsi1: dsi@1a96000 {
> "pixel",
> "core";
>
> - phys = <&dsi1_phy>;
> + phys = <&mdss_dsi1_phy>;
>
> status = "disabled";
>
> @@ -970,20 +970,20 @@ ports {
>
> port@0 {
> reg = <0>;
> - dsi1_in: endpoint {
> + mdss_dsi1_in: endpoint {
> remote-endpoint = <&mdp5_intf2_out>;
> };
> };
>
> port@1 {
> reg = <1>;
> - dsi1_out: endpoint {
> + mdss_dsi1_out: endpoint {
> };
> };
> };
> };
>
> - dsi1_phy: phy@1a96400 {
> + mdss_dsi1_phy: phy@1a96400 {
> compatible = "qcom,dsi-phy-14nm-8953";
> reg = <0x01a96400 0x100>,
> <0x01a96500 0x300>,
