Hi Chris, chris.packham@xxxxxxxxxxxxxxxxxxx wrote on Wed, 31 May 2023 11:54:53 +1200: > From: Vadym Kochan <vadym.kochan@xxxxxxxxxxx> > > Marvell NAND controller has now YAML to validate it's DT bindings, so > change the node name of cp11x DTSI as it is required by nand-controller.yaml > > Signed-off-by: Vadym Kochan <vadym.kochan@xxxxxxxxxxx> > Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx> Reviewed-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx> > --- > arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi > index 0cc9ee9871e7..4ec1aae0a3a9 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi > @@ -468,7 +468,7 @@ CP11X_LABEL(uart3): serial@702300 { > status = "disabled"; > }; > > - CP11X_LABEL(nand_controller): nand@720000 { > + CP11X_LABEL(nand_controller): nand-controller@720000 { > /* > * Due to the limitation of the pins available > * this controller is only usable on the CPM Thanks, Miquèl