Re: [PATCH net-next v4 0/7] net: dsa: mv88e6xxx: add 88E6361 support

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Hello:

This series was applied to netdev/net-next.git (main)
by Jakub Kicinski <kuba@xxxxxxxxxx>:

On Mon, 29 May 2023 10:02:39 +0200 you wrote:
> This series brings initial support for Marvell 88E6361 switch.
> 
> MV88E6361 is a 8 ports switch with 5 integrated Gigabit PHYs and 3
> 2.5Gigabit SerDes interfaces. It is in fact a new variant in the
> 88E639X/88E6193X/88E6191X family with a subset of existing features:
> - port 0: MII, RMII, RGMII, 1000BaseX, 2500BaseX
> - port 3 to 7: triple speed internal phys
> - port 9 and 10: 1000BaseX, 25000BaseX
> 
> [...]

Here is the summary with links:
  - [net-next,v4,1/7] dt-bindings: net: dsa: marvell: add MV88E6361 switch to compatibility list
    https://git.kernel.org/netdev/net-next/c/9229a9483d80
  - [net-next,v4,2/7] net: dsa: mv88e6xxx: pass directly chip structure to mv88e6xxx_phy_is_internal
    https://git.kernel.org/netdev/net-next/c/ca345931907f
  - [net-next,v4,3/7] net: dsa: mv88e6xxx: use mv88e6xxx_phy_is_internal in mv88e6xxx_port_ppu_updates
    https://git.kernel.org/netdev/net-next/c/7a2dd00be869
  - [net-next,v4,4/7] net: dsa: mv88e6xxx: add field to specify internal phys layout
    https://git.kernel.org/netdev/net-next/c/3ba89b28adb2
  - [net-next,v4,5/7] net: dsa: mv88e6xxx: fix 88E6393X family internal phys layout
    https://git.kernel.org/netdev/net-next/c/2f93493970df
  - [net-next,v4,6/7] net: dsa: mv88e6xxx: pass mv88e6xxx_chip structure to port_max_speed_mode
    https://git.kernel.org/netdev/net-next/c/18e1b7422dff
  - [net-next,v4,7/7] net: dsa: mv88e6xxx: enable support for 88E6361 switch
    https://git.kernel.org/netdev/net-next/c/12899f299803

You are awesome, thank you!
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