On 30/05/2023 11:51, Thierry Reding wrote:
From: Prathamesh Shete <pshete@xxxxxxxxxx>
Ports S, T, U and V are in a separate controller that is part of the FSI
domain. Remove their definitions from the MAIN controller definitions to
get rid of the confusion.
This technically breaks ABI compatibility with old device trees. However
it doesn't cause issues in practice. The GPIO pins impacted by this are
used for non-critical functionality.
Fixes: a8b10f3d12cfc ("dt-bindings: gpio: Add Tegra234 support")
Signed-off-by: Prathamesh Shete <pshete@xxxxxxxxxx>
[treding@xxxxxxxxxx: rewrite commit message]
Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
---
Changes in v3:
- rewrite commit message to provide a bit more background
I believe that this is actually V1 in case anyone is confused. I know
that we had kicked this around off-list before sending out and this is
why is appears as V3, but should be V1.
include/dt-bindings/gpio/tegra234-gpio.h | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/include/dt-bindings/gpio/tegra234-gpio.h b/include/dt-bindings/gpio/tegra234-gpio.h
index d7a1f2e298e8..784673c2c752 100644
--- a/include/dt-bindings/gpio/tegra234-gpio.h
+++ b/include/dt-bindings/gpio/tegra234-gpio.h
@@ -33,18 +33,14 @@
#define TEGRA234_MAIN_GPIO_PORT_P 14
#define TEGRA234_MAIN_GPIO_PORT_Q 15
#define TEGRA234_MAIN_GPIO_PORT_R 16
-#define TEGRA234_MAIN_GPIO_PORT_S 17
-#define TEGRA234_MAIN_GPIO_PORT_T 18
-#define TEGRA234_MAIN_GPIO_PORT_U 19
-#define TEGRA234_MAIN_GPIO_PORT_V 20
-#define TEGRA234_MAIN_GPIO_PORT_X 21
-#define TEGRA234_MAIN_GPIO_PORT_Y 22
-#define TEGRA234_MAIN_GPIO_PORT_Z 23
-#define TEGRA234_MAIN_GPIO_PORT_AC 24
-#define TEGRA234_MAIN_GPIO_PORT_AD 25
-#define TEGRA234_MAIN_GPIO_PORT_AE 26
-#define TEGRA234_MAIN_GPIO_PORT_AF 27
-#define TEGRA234_MAIN_GPIO_PORT_AG 28
+#define TEGRA234_MAIN_GPIO_PORT_X 17
+#define TEGRA234_MAIN_GPIO_PORT_Y 18
+#define TEGRA234_MAIN_GPIO_PORT_Z 19
+#define TEGRA234_MAIN_GPIO_PORT_AC 20
+#define TEGRA234_MAIN_GPIO_PORT_AD 21
+#define TEGRA234_MAIN_GPIO_PORT_AE 22
+#define TEGRA234_MAIN_GPIO_PORT_AF 23
+#define TEGRA234_MAIN_GPIO_PORT_AG 24
#define TEGRA234_MAIN_GPIO(port, offset) \
((TEGRA234_MAIN_GPIO_PORT_##port * 8) + offset)
Otherwise ...
Reviewed-by: Jon Hunter <jonathanh@xxxxxxxxxx>
Thanks!
Jon
--
nvpublic
