On 25.05.2023 19:21, Jagadeesh Kona wrote:
> In lucid evo pll, the CAL_L field is part of L value register itself, and
> the l value configuration passed from clock controller driver includes
> CAL_L and L values as well. Hence remove explicit configuration of CAL_L
> for evo pll.
>
> Fixes: 260e36606a03 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces")
> Signed-off-by: Taniya Das <quic_tdas@xxxxxxxxxxx>
> Signed-off-by: Jagadeesh Kona <quic_jkona@xxxxxxxxxxx>
> ---
Oh that isn't obvious at first sight, nice find!
I'd suggest a different solution though:
#define LUCID_EVO_PLL_L_LVAL GENMASK(..
#define LUCID_EVO_PLL_L_CAL_L GENMASK(..
lval = FIELD_PREP(LUCID_EVO_PLL_L_LVAL, config->l) |
FIELD_PREP(LUCID_EVO_PLL_L_CAL_L, config->cal_l);
This would make the separation between the two parts more explicit
however
config->l would then represent the L value and not the end value
written to the L register
Up to you, whichever you find saner!
Konrad
> Changes since V1:
> - Newly added.
>
> drivers/clk/qcom/clk-alpha-pll.c | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index f81c7c561352..68a80395997b 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -270,7 +270,6 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
> #define LUCID_EVO_PCAL_NOT_DONE BIT(8)
> #define LUCID_EVO_ENABLE_VOTE_RUN BIT(25)
> #define LUCID_EVO_PLL_L_VAL_MASK GENMASK(15, 0)
> -#define LUCID_EVO_PLL_CAL_L_VAL_SHIFT 16
>
> /* ZONDA PLL specific */
> #define ZONDA_PLL_OUT_MASK 0xf
> @@ -2084,10 +2083,7 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_zonda_ops);
> void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
> const struct alpha_pll_config *config)
> {
> - u32 lval = config->l;
> -
> - lval |= TRION_PLL_CAL_VAL << LUCID_EVO_PLL_CAL_L_VAL_SHIFT;
> - clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);
> + clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
> clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
> clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
> clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
