Il 25/05/23 16:50, Alexandre Mergnat ha scritto:
The “mcu_pm_bclk_ck_cg” clock is used by co-processors and should not be added to the kernel driver, otherwise the CPU just halt and the board is rebooted by the wathdog. Instead, add the "aes_top0_bclk_ck_cg" missing clock to prevent re-shuffling index and then preserve the ABI.
It's still a breakage. Besides, have you tried to add it as CLK_IS_CRITICAL? :-) Cheers, Angelo
Signed-off-by: Alexandre Mergnat <amergnat@xxxxxxxxxxxx> --- include/dt-bindings/clock/mediatek,mt8365-clk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/mediatek,mt8365-clk.h b/include/dt-bindings/clock/mediatek,mt8365-clk.h index f9aff1775810..0a841e7cc1c3 100644 --- a/include/dt-bindings/clock/mediatek,mt8365-clk.h +++ b/include/dt-bindings/clock/mediatek,mt8365-clk.h @@ -199,7 +199,7 @@ #define CLK_IFR_PWRAP_TMR 46 #define CLK_IFR_PWRAP_SPI 47 #define CLK_IFR_PWRAP_SYS 48 -#define CLK_IFR_MCU_PM_BK 49 +#define CLK_IFR_AES_TOP0_BK 49 #define CLK_IFR_IRRX_26M 50 #define CLK_IFR_IRRX_32K 51 #define CLK_IFR_I2C0_AXI 52
