Like any other SOCs, Qualcomm's IPQ SOCs also have an efuse region which exposes the HW quirks like CPU Freq limit and so on. This series add the basic support for the efuse. Feature specific fuses will be added along with the feature set. Kathiravan T (4): dt-bindings: nvmem: qfprom: add compatible for few IPQ SoCs arm64: dts: qcom: ipq5332: add QFPROM node arm64: dts: qcom: ipq6018: add QFPROM node arm64: dts: qcom: ipq9574: add QFPROM node Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 3 +++ arch/arm64/boot/dts/qcom/ipq5332.dtsi | 7 +++++++ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 7 +++++++ 4 files changed, 24 insertions(+) -- 2.17.1
