On Thu, May 18, 2023 at 11:17:49PM +0530, Rohit Agarwal wrote: > Add PCIe EP compatible string for SDX65 SoC. > > Signed-off-by: Rohit Agarwal <quic_rohiagar@xxxxxxxxxxx> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> Bjorn, Lorenzo, please pick this patch through the PCI tree (to avoid any merge issues). Thanks, Bjorn > --- > Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > index b3c22eb..8111122 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > @@ -13,6 +13,7 @@ properties: > compatible: > enum: > - qcom,sdx55-pcie-ep > + - qcom,sdx65-pcie-ep > - qcom,sm8450-pcie-ep > > reg: > @@ -109,6 +110,7 @@ allOf: > contains: > enum: > - qcom,sdx55-pcie-ep > + - qcom,sdx65-pcie-ep > then: > properties: > clocks: > -- > 2.7.4 >
