On Wed, May 24, 2023 at 03:01:24PM +0200, Alexis Lothoré wrote:
> mv88e6xxx currently assumes that switch equipped with internal phys have
> those phys mapped contiguously starting from port 0 (see
> mv88e6xxx_phy_is_internal). However, some switches have internal PHYs but
> NOT starting from port 0. For example 88e6393X, 88E6193X and 88E6191X have
> integrated PHYs available on ports 1 to 8
> To properly support this offset, add a new field to allow specifying an
> internal PHYs layout. If field is not set, default layout is assumed (start
> at port 0)
>
> ---
> Changes since v2:
> - move start/end computation out of for loop
> - remove whitespace
>
> Signed-off-by: Alexis Lothoré <alexis.lothore@xxxxxxxxxxx>
Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
Andrew
