This adds support for a COTS monitor connected to X17.
4k monitors can be used, but are limited to 1080p.
Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
---
Changes in v2:
* Fix typo for pinctrl-* property
arch/arm/boot/dts/imx6qdl-mba6.dtsi | 41 +++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/imx6qdl-mba6.dtsi
index 7b7e6c2ad190..3be003c72de9 100644
--- a/arch/arm/boot/dts/imx6qdl-mba6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-mba6.dtsi
@@ -192,6 +192,13 @@ ethphy: ethernet-phy@3 {
};
};
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hdmi>;
+ ddc-i2c-bus = <&i2c2>;
+ status = "okay";
+};
+
&i2c1 {
tlv320aic32x4: audio-codec@18 {
compatible = "ti,tlv320aic32x4";
@@ -205,6 +212,17 @@ tlv320aic32x4: audio-codec@18 {
};
};
+/* DDC */
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ pinctrl-1 = <&pinctrl_i2c2_recovery>;
+ scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+};
+
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
@@ -396,6 +414,15 @@ MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb099 /* LED V16 */
>;
};
+ pinctrl_hdmi: hdmigrp {
+ /* NOTE: DDC is done via I2C2, so DON'T
+ * configure DDC pins for HDMI!
+ */
+ fsl,pins = <
+ MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
+ >;
+ };
+
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099
@@ -432,6 +459,20 @@ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x0001b099
>;
};
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899
+ >;
+ };
+
+ pinctrl_i2c2_recovery: i2c2recoverygrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b899
+ MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b899
+ >;
+ };
+
pinctrl_pcie: pciegrp {
fsl,pins = <
/* HYS = 1, DSE = 110, 100k up, SPEED = HIGH (11)*/
--
2.34.1
