Enable the Display Clock Controller by default in SoC DTSI so unused
clocks can be turned off. It does not require any external resources,
so as core SoC component should be always available to boards.
Suggested-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
Changes in v2:
1. New patch
---
arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 4 ----
arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 -
2 files changed, 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 785889450e8a..f27d5c657f44 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -419,10 +419,6 @@ vreg_l3g_1p2: ldo3 {
};
};
-&dispcc {
- status = "okay";
-};
-
&mdss {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 6e9bad8f6f33..0a3a08336b46 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2684,7 +2684,6 @@ dispcc: clock-controller@af00000 {
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
- status = "disabled";
};
usb_1_hsphy: phy@88e3000 {
--
2.34.1
