Enable SAI3, add the codec and pinctrl nodes to enable audio support on MBa8MPxL. Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx> --- .../freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts index d8fb29e7e148..4240e20d38ac 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts @@ -202,6 +202,13 @@ linux,cma { }; }; + sound { + compatible = "fsl,imx-audio-tlv320aic32x4"; + model = "tq-tlv320aic32x"; + audio-cpu = <&sai3>; + audio-codec = <&tlv320aic3x04>; + }; + thermal-zones { soc-thermal { trips { @@ -449,6 +456,18 @@ &i2c2 { sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; + tlv320aic3x04: audio-codec@18 { + compatible = "ti,tlv320aic32x4"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tlv320aic3x04>; + reg = <0x18>; + clock-names = "mclk"; + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>; + reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>; + iov-supply = <®_vcc_3v3>; + ldoin-supply = <®_vcc_3v3>; + }; + se97_1c: temperature-sensor@1c { compatible = "nxp,se97b", "jedec,jc-42.4-temp"; reg = <0x1c>; @@ -528,6 +547,16 @@ &pwm3 { status = "okay"; }; +&sai3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai3>; + assigned-clocks = <&clk IMX8MP_CLK_SAI3>; + assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; + assigned-clock-rates = <12288000>; + fsl,sai-mclk-direction-output; + status = "okay"; +}; + &snvs_pwrkey { status = "okay"; }; @@ -843,6 +872,23 @@ pinctrl_regpwmfan: regpwmfangrp { fsl,pins = <MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x80>; }; + pinctrl_sai3: sai3grp { + fsl,pins = < + MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0x94 + MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0x94 + MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0x94 + MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0x94 + MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0x94 + >; + }; + + pinctrl_tlv320aic3x04: tlv320aic3x04grp { + fsl,pins = < + /* CODEC RST# */ + MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x180 + >; + }; + /* X61 */ pinctrl_uart1: uart1grp { fsl,pins = <MX8MP_IOMUXC_SD1_CLK__UART1_DCE_TX 0x140>, -- 2.34.1