Hi Marek, Am Montag, 15. Mai 2023, 18:32:24 CEST schrieb Marek Vasut: > Add DT node for the DeWarp Engine of the i.MX8MP. > > Signed-off-by: Marek Vasut <marex@xxxxxxx> > --- > Cc: Conor Dooley <conor+dt@xxxxxxxxxx> > Cc: Fabio Estevam <festevam@xxxxxxxxx> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx> > Cc: Laurent Pinchart <Laurent.pinchart@xxxxxxxxxxxxxxxx> > Cc: NXP Linux Team <linux-imx@xxxxxxx> > Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx> > Cc: Richard Cochran <richardcochran@xxxxxxxxx> > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> > Cc: Shawn Guo <shawnguo@xxxxxxxxxx> > Cc: devicetree@xxxxxxxxxxxxxxx > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx While the node itself is okay, could you please add a patch for reordering the other nodes in aips4 before adding dewarp? dwe@32e30000 should be at the top after ISI (ISP not yet added). Best regards, Alexander > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index > 245c560674de7..b64c944eecf82 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1534,6 +1534,16 @@ isi_in_1: endpoint { > }; > }; > > + dewarp: dwe@32e30000 { > + compatible = "nxp,imx8mp-dw100"; > + reg = <0x32e30000 0x10000>; > + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, > + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; > + clock-names = "axi", "ahb"; > + power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE>; > + }; > + > mipi_csi_0: csi@32e40000 { > compatible = "fsl,imx8mp-mipi-csi2", "fsl,imx8mm-mipi-csi2"; > reg = <0x32e40000 0x10000>; -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/