On 2023/5/9 23:17, Xingyu Wu wrote:
> Add the watchdog node for the Starfive JH7110 SoC.
>
> Signed-off-by: Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx>
> ---
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 4c5fdb905da8..47c163ec0bf1 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -469,6 +469,16 @@ sysgpio: pinctrl@13040000 {
> #gpio-cells = <2>;
> };
>
> + watchdog@13070000 {
> + compatible = "starfive,jh7110-wdt";
> + reg = <0x0 0x13070000 0x0 0x10000>;
> + clocks = <&syscrg JH7110_SYSCLK_WDT_APB>,
> + <&syscrg JH7110_SYSCLK_WDT_CORE>;
> + clock-names = "apb", "core";
> + resets = <&syscrg JH7110_SYSRST_WDT_APB>,
> + <&syscrg JH7110_SYSRST_WDT_CORE>;
> + };
> +
> aoncrg: clock-controller@17000000 {
> compatible = "starfive,jh7110-aoncrg";
> reg = <0x0 0x17000000 0x0 0x10000>;
Reviewed-by: Walker Chen <walker.chen@xxxxxxxxxxxxxxxx>
Thanks!
