On Thu, Apr 13, 2023 at 11:50:43AM -0400, Frank Li wrote:
> Resolve USB 3.0 gadget failure for QM and QXPB0 in super speed mode with single
> IN and OUT endpoints, like mass storage devices, due to incorrect
> ACTUAL_MEM_SIZE in ep_cap2 (32k instead of actual 18k). Implement dt property
> cdns,on-chip-buff-size to override ep_cap2 and set it to 18k for imx8QM and
> imx8QXP chips. No adverse effects for 8QXP C0.
>
> Fixes: dce49449e04ff ("usb: cdns3: allocate TX FIFO size according to composite EP number")
>
> Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
There are a couple of check patch warnings on commit log.
WARNING: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#7:
Resolve USB 3.0 gadget failure for QM and QXPB0 in super speed mode with single
WARNING: Please use correct Fixes: style 'Fixes: <12 chars of sha1> ("<title line>")' - ie: 'Fixes: dce49449e04f ("usb: cdns3: allocate TX FIFO size according to composite EP number")'
#13:
Fixes: dce49449e04ff ("usb: cdns3: allocate TX FIFO size according to composite EP number")
> ---
> arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> index b32c2e199c160..030c273c8be40 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> @@ -171,6 +171,7 @@ usbotg3_cdns3: usb@5b120000 {
> interrupt-names = "host", "peripheral", "otg", "wakeup";
> phys = <&usb3_phy>;
> phy-names = "cdns3,usb3-phy";
> + cdns,on-chip-buff-size = /bits/ 16 <18>;
The property is defined as uint32 in the bindings. Not sure why we
need to enforce 16-bits here.
Shawn
> status = "disabled";
> };
> };
> --
> 2.34.1
>
