On Thu, 11 May 2023 23:05:37 +0100,
Douglas Anderson <dianders@xxxxxxxxxxxx> wrote:
>
> Firmware shipped on mt8183 Chromebooks is affected by the GICR
> save/restore issue as described by the patch ("dt-bindings:
> interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/
> broken FW"). Add the quirk property.
>
> Fixes: e526c9bc11f8 ("arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile")
> Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
> ---
>
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5169779d01df..39545172fce5 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -709,6 +709,7 @@ gic: interrupt-controller@c000000 {
> <0 0x0c400000 0 0x2000>, /* GICC */
> <0 0x0c410000 0 0x1000>, /* GICH */
> <0 0x0c420000 0 0x2000>; /* GICV */
> + mediatek,gicr-save-quirk;
Is that something you can safely generalise at the SoC level? Are
these SoC solely used on Chromebooks, and/or without any hope of
seeing any alternative FW being already in use?
M.
--
Without deviation from the norm, progress is not possible.
