Dne sreda, 10. maj 2023 ob 10:11:11 CEST je Maksim Kiselev napisal(a): > These SoCs has two SPI controllers. One of it is quite similar to previous > ones, but with internal clock divider removed; the other added MIPI DBI > Type-C offload based on the first one. > > Add basical support for these controllers. As we're not going to > support the DBI functionality now, just implement the two kinds of > controllers as the same. > > Co-developed-by: Icenowy Zheng <icenowy@xxxxxxx> > Signed-off-by: Maksim Kiselev <bigunclemax@xxxxxxxxx> > Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx> Reviewed-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx> Best regards, Jernej
