On Sun, Apr 30, 2023 at 03:34:43PM +0300, Arınç ÜNAL wrote: > On 30.04.2023 14:28, David Bauer wrote: > > Document the ability to add nodes for the MDIO bus connecting the > > switch-internal PHYs. > > This is quite interesting. Currently the PHY muxing feature for the MT7530 > switch looks for some fake ethernet-phy definitions on the mdio-bus where > the switch is also defined. > > Looking at the binding here, there will be an mdio node under the switch > node. This could be useful to define the ethernet-phys for PHY muxing here > instead, so we don't waste the register addresses on the parent mdio-bus for > fake things. It looks like this should work right out of the box. I will do > some tests. > > Are there any examples as to what to configure on the switch PHYs with this > change? > > > > > Signed-off-by: David Bauer <mail@xxxxxxxxxxxxxxx> > > --- > > .../devicetree/bindings/net/dsa/mediatek,mt7530.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml > > index e532c6b795f4..50f8f83cc440 100644 > > --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml > > +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml > > @@ -128,6 +128,12 @@ properties: > > See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for > > details for the regulator setup on these boards. > > + mdio: > > + $ref: /schemas/net/mdio.yaml# > > + unevaluatedProperties: false > > + description: > > + Node for the internal MDIO bus connected to the embedded ethernet-PHYs. > > Please set this property as false for mediatek,mt7988-switch as it doesn't > use MDIO. Well, quite the opposite is true. This change is **needed** on MT7988 as the built-in 1GE PHYs of the MT7988 are connected to the (internal) MDIO bus of the switch. And they do need calibration data assigned as nvmem via device tree. tl;dr: Despite not being connected via MDIO itself also MT7988 exposes an internal MDIO bus for the switch PHYs.
