Re: [PATCH v2 3/9] clk: sunxi: Add prcm mod0 clock driver

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Hi,

On 11/25/2014 05:57 PM, Lee Jones wrote:
On Sun, 23 Nov 2014, Hans de Goede wrote:

Add a driver for mod0 clocks found in the prcm. Currently there is only
one mod0 clocks in the prcm, the ir clock.

Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx>
---
  Documentation/devicetree/bindings/clock/sunxi.txt |  1 +
  drivers/clk/sunxi/Makefile                        |  2 +-
  drivers/clk/sunxi/clk-sun6i-prcm-mod0.c           | 63 +++++++++++++++++++++++
  drivers/mfd/sun6i-prcm.c                          | 14 +++++
  4 files changed, 79 insertions(+), 1 deletion(-)
  create mode 100644 drivers/clk/sunxi/clk-sun6i-prcm-mod0.c

[...]

diff --git a/drivers/mfd/sun6i-prcm.c b/drivers/mfd/sun6i-prcm.c
index 283ab8d..ff1254f 100644
--- a/drivers/mfd/sun6i-prcm.c
+++ b/drivers/mfd/sun6i-prcm.c
@@ -41,6 +41,14 @@ static const struct resource sun6i_a31_apb0_gates_clk_res[] = {
  	},
  };

+static const struct resource sun6i_a31_ir_clk_res[] = {
+	{
+		.start = 0x54,
+		.end = 0x57,
+		.flags = IORESOURCE_MEM,
+	},
+};

I'm not overly keen on these magic numbers (and yes, I'm well aware
that I SoB'ed the patch which started them off).

It's not a show stopper, although I'd prefer if they were fixed with a
subsequent patch.

These are offsets of the relevant registers inside the prcm register block,
if not done this way, then how should they be done ?

Regards,

Hans
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