On Tue, Apr 18, 2023 at 09:23:58PM +0900, Yoshihiro Shimoda wrote: > Document bindings for Renesas R-Car Gen4 and R-Car S4-8 (R8A779F0) > PCIe host module. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> > Reviewed-by: Rob Herring <robh@xxxxxxxxxx> > Reviewed-by: Serge Semin <fancer.lancer@xxxxxxxxx> > --- > .../bindings/pci/rcar-gen4-pci-host.yaml | 109 ++++++++++++++++++ > 1 file changed, 109 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml > > diff --git a/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml > new file mode 100644 > index 000000000000..637353c3df8b > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml > @@ -0,0 +1,109 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) 2022 Renesas Electronics Corp. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/rcar-gen4-pci-host.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas R-Car Gen4 PCIe Host > + > +maintainers: > + - Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> > + > +allOf: > + - $ref: snps,dw-pcie.yaml# > + > +properties: > + compatible: > + items: > + - const: renesas,r8a779f0-pcie # R-Car S4-8 > + - const: renesas,rcar-gen4-pcie # R-Car Gen4 > + > + reg: > + maxItems: 6 > + > + reg-names: > + items: > + - const: dbi > + - const: dbi2 > + - const: atu > + - const: dma > + - const: app > + - const: config > + > + interrupts: > + maxItems: 4 > + > + interrupt-names: > + items: > + - const: msi > + - const: dma > + - const: sft_ce > + - const: app > + > + clocks: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + max-link-speed: > + maximum: 4 > + > + num-lanes: > + maximum: 4 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - power-domains > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/power/r8a779f0-sysc.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + pcie: pcie@e65d0000 { > + compatible = "renesas,r8a779f0-pcie", "renesas,rcar-gen4-pcie"; > + reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, > + <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, > + <0 0xe65d6200 0 0x0e00>, <0 0xfe000000 0 0x400000>; > + reg-names = "dbi", "dbi2", "atu", "dma", "app", "config"; > + #address-cells = <3>; > + #size-cells = <2>; > + bus-range = <0x00 0xff>; > + device_type = "pci"; > + ranges = <0x81000000 0 0x00000000 0 0xfe000000 0 0x00400000 > + 0x82000000 0 0x30000000 0 0x30000000 0 0x10000000>; Do you actually need relocatable (0x8) flag? - Mani > + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; > + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "msi", "dma", "sft_ce", "app"; > + #interrupt-cells = <1>; > + interrupt-map-mask = <0 0 0 7>; > + interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH > + 0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH > + 0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH > + 0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 624>; > + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; > + resets = <&cpg 624>; > + num-lanes = <2>; > + snps,enable-cdm-check; > + max-link-speed = <2>; > + }; > + }; > -- > 2.25.1 > -- மணிவண்ணன் சதாசிவம்
