As all level 2 and level 3 caches are unified, add required cache-unified and cache-level properties to fix warnings like: lg1312-ref.dtb: l2-cache0: 'cache-level' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> --- Please take the patch via sub-arch SoC tree. --- arch/arm64/boot/dts/lg/lg1312.dtsi | 2 ++ arch/arm64/boot/dts/lg/lg1313.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi index 78ae73d0cf36..48ec4ebec0a8 100644 --- a/arch/arm64/boot/dts/lg/lg1312.dtsi +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi @@ -48,6 +48,8 @@ cpu3: cpu@3 { }; L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi index 2173316573be..3869460aa5dc 100644 --- a/arch/arm64/boot/dts/lg/lg1313.dtsi +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi @@ -48,6 +48,8 @@ cpu3: cpu@3 { }; L2_0: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; }; }; -- 2.34.1