Add AON PMU for StarFive JH7110 SoC. It can be used to turn on/off the
dphy rx/tx power switch.
Reviewed-by: Walker Chen <walker.chen@xxxxxxxxxxxxxxxx>
Signed-off-by: Changhuang Liang <changhuang.liang@xxxxxxxxxxxxxxxx>
---
MAINTAINERS | 1 +
drivers/soc/starfive/jh71xx_pmu.c | 63 ++++++++++++++++++++++++++++++-
2 files changed, 63 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0fafeea8ebdb..8f32d43a9b67 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19950,6 +19950,7 @@ F: include/dt-bindings/reset/starfive?jh71*.h
STARFIVE JH71XX PMU CONTROLLER DRIVER
M: Walker Chen <walker.chen@xxxxxxxxxxxxxxxx>
+M: Changhuang Liang <changhuang.liang@xxxxxxxxxxxxxxxx>
S: Supported
F: Documentation/devicetree/bindings/power/starfive*
F: drivers/soc/starfive/jh71xx_pmu.c
diff --git a/drivers/soc/starfive/jh71xx_pmu.c b/drivers/soc/starfive/jh71xx_pmu.c
index bb44cc93e822..1303826aa7b5 100644
--- a/drivers/soc/starfive/jh71xx_pmu.c
+++ b/drivers/soc/starfive/jh71xx_pmu.c
@@ -2,7 +2,7 @@
/*
* StarFive JH71XX PMU (Power Management Unit) Controller Driver
*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
*/
#include <linux/interrupt.h>
@@ -24,6 +24,9 @@
#define JH71XX_PMU_EVENT_STATUS 0x88
#define JH71XX_PMU_INT_STATUS 0x8C
+/* aon pmu register offset */
+#define JH71XX_AON_PMU_SWITCH 0x00
+
/* sw encourage cfg */
#define JH71XX_PMU_SW_ENCOURAGE_EN_LO 0x05
#define JH71XX_PMU_SW_ENCOURAGE_EN_HI 0x50
@@ -163,6 +166,23 @@ static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
return 0;
}
+static int jh7110_aon_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
+{
+ struct jh71xx_pmu *pmu = pmd->pmu;
+ unsigned long flags;
+
+ spin_lock_irqsave(&pmu->lock, flags);
+
+ if (on)
+ regmap_update_bits(pmu->base, JH71XX_AON_PMU_SWITCH, mask, mask);
+ else
+ regmap_update_bits(pmu->base, JH71XX_AON_PMU_SWITCH, mask, 0);
+
+ spin_unlock_irqrestore(&pmu->lock, flags);
+
+ return 0;
+}
+
static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
{
struct jh71xx_pmu *pmu = pmd->pmu;
@@ -270,6 +290,24 @@ static int jh7110_pmu_parse_dt(struct platform_device *pdev, struct jh71xx_pmu *
return 0;
}
+static int jh7110_aon_pmu_parse_dt(struct platform_device *pdev, struct jh71xx_pmu *pmu)
+{
+ struct device *parent;
+ struct device *dev = &pdev->dev;
+
+ parent = pdev->dev.parent;
+ if (!parent) {
+ dev_err(dev, "No parent for syscon pmu\n");
+ return -ENODEV;
+ }
+
+ pmu->base = syscon_node_to_regmap(parent->of_node);
+ if (IS_ERR(pmu->base))
+ return PTR_ERR(pmu->base);
+
+ return 0;
+}
+
static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index)
{
struct jh71xx_pmu_dev *pmd;
@@ -398,10 +436,32 @@ static const struct jh71xx_pmu_match_data jh7110_pmu = {
.pmu_set_state = jh7110_pmu_set_state,
};
+static const struct jh71xx_domain_info jh7110_aon_power_domains[] = {
+ [JH7110_PD_DPHY_TX] = {
+ .name = "DPHY-TX",
+ .bit = 30,
+ },
+ [JH7110_PD_DPHY_RX] = {
+ .name = "DPHY-RX",
+ .bit = 31,
+ },
+};
+
+static const struct jh71xx_pmu_match_data jh7110_aon_pmu = {
+ .num_domains = ARRAY_SIZE(jh7110_aon_power_domains),
+ .domain_info = jh7110_aon_power_domains,
+ .pmu_status = JH71XX_AON_PMU_SWITCH,
+ .pmu_parse_dt = jh7110_aon_pmu_parse_dt,
+ .pmu_set_state = jh7110_aon_pmu_set_state,
+};
+
static const struct of_device_id jh71xx_pmu_of_match[] = {
{
.compatible = "starfive,jh7110-pmu",
.data = (void *)&jh7110_pmu,
+ }, {
+ .compatible = "starfive,jh7110-aon-pmu",
+ .data = (void *)&jh7110_aon_pmu,
}, {
/* sentinel */
}
@@ -418,5 +478,6 @@ static struct platform_driver jh71xx_pmu_driver = {
builtin_platform_driver(jh71xx_pmu_driver);
MODULE_AUTHOR("Walker Chen <walker.chen@xxxxxxxxxxxxxxxx>");
+MODULE_AUTHOR("Changhuang Liang <changhuang.liang@xxxxxxxxxxxxxxxx>");
MODULE_DESCRIPTION("StarFive JH71XX PMU Driver");
MODULE_LICENSE("GPL");
--
2.25.1
