On 4/17/23 18:26, Rick Wertenbroek wrote:
> From: Damien Le Moal <dlemoal@xxxxxxxxxx>
>
> The address translation unit of the rockchip EP controller does not use
> the lower 8 bits of a PCIe-space address to map local memory. Thus we
> must set the align feature field to 256 to let the user know about this
> constraint.
>
> Signed-off-by: Damien Le Moal <dlemoal@xxxxxxxxxx>
I think this one also needs the tag:
Fixes: cf590b078391 ("...")
Cc: stable@xxxxxxxxxxxxxxx
And you forgot to add you Signed-off-by tag (when sending someones else patch,
you must add your own SoB tag after the author's tag).
> ---
> drivers/pci/controller/pcie-rockchip-ep.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
> index edfced311a9f..0af0e965fb57 100644
> --- a/drivers/pci/controller/pcie-rockchip-ep.c
> +++ b/drivers/pci/controller/pcie-rockchip-ep.c
> @@ -442,6 +442,7 @@ static const struct pci_epc_features rockchip_pcie_epc_features = {
> .linkup_notifier = false,
> .msi_capable = true,
> .msix_capable = false,
> + .align = 256,
> };
>
> static const struct pci_epc_features*
