On Mon, Apr 17, 2023 at 3:38 AM Lucas Stach <l.stach@xxxxxxxxxxxxxx> wrote: > > Hi Adam, > > Am Samstag, dem 15.04.2023 um 05:41 -0500 schrieb Adam Ford: > > NXP uses a lookup table to determine the various values for > > the PHY Timing based on the clock rate in their downstream > > kernel. Since the input clock can be variable, the phy > > settings need to be variable too. Add an additional variable > > to the driver data to enable this feature to prevent breaking > > boards that don't support it. > > > > I haven't checked if this generates values close to the ones in this > table, but I guess it should be worth a try to use > phy_mipi_dphy_get_default_config() instead. I didn't know that was a thing. I like that idea much better than the table. I just pulled what NXP had and tweaked it to fit the mainline. I'll give it a try in the next few days, when I have some more time. adam > > Regards, > Lucas > > > Signed-off-by: Adam Ford <aford173@xxxxxxxxx> > > --- > > drivers/gpu/drm/bridge/samsung-dsim.c | 85 +++++++-- > > drivers/gpu/drm/bridge/samsung-dsim.h | 254 ++++++++++++++++++++++++++ > > include/drm/bridge/samsung-dsim.h | 1 + > > 3 files changed, 326 insertions(+), 14 deletions(-) > > create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.h > > <snip> >
