Re: [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G

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Subject: Re: [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G
From: Vinod Koul <vkoul@xxxxxxxxxx>
Date: Wed, 12 Apr 2023 22:08:07 +0530
Cc: kishon@xxxxxxxxxx, robh+dt@xxxxxxxxxx, krzysztof.kozlowski@xxxxxxxxxx, krzysztof.kozlowski+dt@xxxxxxxxxx, linux-phy@xxxxxxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, srk@xxxxxx
In-reply-to: <20230315092408.1722114-1-s-vadapalli@ti.com>

On 15-03-23, 14:54, Siddharth Vadapalli wrote:
> The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports
> additional PHY modes like QSGMII. Add a compatible for it.
> 
> Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G.

Applied, thanks

-- 
~Vinod

References:
- [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G
  - From: Siddharth Vadapalli

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