On 11/04/2023 18:59, Jim Quinlan wrote: > Regarding "brcm,enable-l1ss": > > The Broadcom STB/CM PCIe HW -- a core that is also used by RPi SOCs -- > requires the driver probe() to deliberately place the HW one of three > CLKREQ# modes: > > (a) CLKREQ# driven by the RC unconditionally > (b) CLKREQ# driven by the EP for ASPM L0s, L1 > (c) Bidirectional CLKREQ#, as used for L1 Substates (L1SS). > > The HW+driver can tell the difference between downstream devices that > need (a) and (b), but does not know when to configure (c). Further, the > HW may cause a CPU abort on boot if guesses wrong regarding the need for > (c). So we introduce the boolean "brcm,enable-l1ss" property to indicate > that (c) is desired. Setting this property only makes sense when the > downstream device is L1SS-capable and the OS is configured to activate > this mode (e.g. policy==superpowersave). > > This property is already present in the Raspian version of Linux, but the > upstream driver implementaion that will follow adds more details and typo, implementation > discerns between (a) and (b). > > Regarding "brcm,completion-timeout-us" > > Our HW will cause a CPU abort if the L1SS exit time is longer than the > PCIe transaction completion abort timeout. We've been asked to make this > configurable, so we are introducing "brcm,completion-timeout-us". > > Signed-off-by: Jim Quinlan <jim2101024@xxxxxxxxx> What happened here? Where is the changelog? Best regards, Krzysztof