The Qcom PCIe controller is capable of using either internal MSI controller or the external GIC-ITS for signaling MSIs sent by endpoint devices. Currently, the binding only documents the internal MSI implementation. Let's document the GIC-ITS imeplementation by making use of msi-map and msi-map-mask properties. Only one of the implementation should be used at a time and the drivers can choose the preferred one. Reviewed-by: Rob Herring <robh@xxxxxxxxxx> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> --- Changes in v4: * Spun off from the "Qcom: Add GIC-ITS support to SM8450 PCIe controllers" series and incorporated the change to allow both MSI implementations. * Added Reviewed-by tag from Rob Changes in v3: * Reworded the commit messages as per Lorenzo's comments * Rebased on top of v6.2-rc1 Changes in v2: * Swapped the Device ID for PCIe0 as it causes same issue as PCIe1 * Removed the definition of msi-map and msi-map-mask from binding * Added Ack from Krzysztof Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 5d236bac99b6..b26fff04859d 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -130,14 +130,20 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - - "#interrupt-cells" - interrupt-map-mask - interrupt-map - clocks - clock-names +anyOf: + - required: + - interrupts + - interrupt-names + - "#interrupt-cells" + - required: + - msi-map + - msi-map-mask + allOf: - $ref: /schemas/pci/pci-bus.yaml# - if: -- 2.25.1
