Turn CBF into the interconnect provider. Scale CBF frequency (bandwidth)
according to CPU frequencies.
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 51 +++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 4661a556772e..7c65e9955365 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interconnect/qcom,msm8996.h>
+#include <dt-bindings/interconnect/qcom,msm8996-cbf.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,apr.h>
@@ -49,6 +50,7 @@ CPU0: cpu@0 {
cpu-idle-states = <&CPU_SLEEP_0>;
capacity-dmips-mhz = <1024>;
clocks = <&kryocc 0>;
+ interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>;
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
@@ -66,6 +68,7 @@ CPU1: cpu@1 {
cpu-idle-states = <&CPU_SLEEP_0>;
capacity-dmips-mhz = <1024>;
clocks = <&kryocc 0>;
+ interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>;
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
@@ -79,6 +82,7 @@ CPU2: cpu@100 {
cpu-idle-states = <&CPU_SLEEP_0>;
capacity-dmips-mhz = <1024>;
clocks = <&kryocc 1>;
+ interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>;
operating-points-v2 = <&cluster1_opp>;
#cooling-cells = <2>;
next-level-cache = <&L2_1>;
@@ -96,6 +100,7 @@ CPU3: cpu@101 {
cpu-idle-states = <&CPU_SLEEP_0>;
capacity-dmips-mhz = <1024>;
clocks = <&kryocc 1>;
+ interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>;
operating-points-v2 = <&cluster1_opp>;
#cooling-cells = <2>;
next-level-cache = <&L2_1>;
@@ -147,91 +152,109 @@ opp-307200000 {
opp-hz = /bits/ 64 <307200000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-422400000 {
opp-hz = /bits/ 64 <422400000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-480000000 {
opp-hz = /bits/ 64 <480000000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-556800000 {
opp-hz = /bits/ 64 <556800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-652800000 {
opp-hz = /bits/ 64 <652800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <384000>;
};
opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <460800>;
};
opp-844800000 {
opp-hz = /bits/ 64 <844800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <537600>;
};
opp-960000000 {
opp-hz = /bits/ 64 <960000000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <672000>;
};
opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <672000>;
};
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <825600>;
};
opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <825600>;
};
opp-1228800000 {
opp-hz = /bits/ 64 <1228800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <902400>;
};
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
opp-supported-hw = <0xd>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1056000>;
};
opp-1363200000 {
opp-hz = /bits/ 64 <1363200000>;
opp-supported-hw = <0x2>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1132800>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
opp-supported-hw = <0xd>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1132800>;
};
opp-1478400000 {
opp-hz = /bits/ 64 <1478400000>;
opp-supported-hw = <0x9>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1190400>;
};
opp-1497600000 {
opp-hz = /bits/ 64 <1497600000>;
opp-supported-hw = <0x04>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1305600>;
};
opp-1593600000 {
opp-hz = /bits/ 64 <1593600000>;
opp-supported-hw = <0x9>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1382400>;
};
};
@@ -245,136 +268,163 @@ opp-307200000 {
opp-hz = /bits/ 64 <307200000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-403200000 {
opp-hz = /bits/ 64 <403200000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-480000000 {
opp-hz = /bits/ 64 <480000000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-556800000 {
opp-hz = /bits/ 64 <556800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-652800000 {
opp-hz = /bits/ 64 <652800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-729600000 {
opp-hz = /bits/ 64 <729600000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <307200>;
};
opp-806400000 {
opp-hz = /bits/ 64 <806400000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <384000>;
};
opp-883200000 {
opp-hz = /bits/ 64 <883200000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <460800>;
};
opp-940800000 {
opp-hz = /bits/ 64 <940800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <537600>;
};
opp-1036800000 {
opp-hz = /bits/ 64 <1036800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <595200>;
};
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <672000>;
};
opp-1190400000 {
opp-hz = /bits/ 64 <1190400000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <672000>;
};
opp-1248000000 {
opp-hz = /bits/ 64 <1248000000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <748800>;
};
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <825600>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <902400>;
};
opp-1478400000 {
opp-hz = /bits/ 64 <1478400000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <979200>;
};
opp-1555200000 {
opp-hz = /bits/ 64 <1555200000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1056000>;
};
opp-1632000000 {
opp-hz = /bits/ 64 <1632000000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1190400>;
};
opp-1708800000 {
opp-hz = /bits/ 64 <1708800000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1228800>;
};
opp-1785600000 {
opp-hz = /bits/ 64 <1785600000>;
opp-supported-hw = <0xf>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1305600>;
};
opp-1804800000 {
opp-hz = /bits/ 64 <1804800000>;
opp-supported-hw = <0xe>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1305600>;
};
opp-1824000000 {
opp-hz = /bits/ 64 <1824000000>;
opp-supported-hw = <0x1>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1382400>;
};
opp-1900800000 {
opp-hz = /bits/ 64 <1900800000>;
opp-supported-hw = <0x4>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1305600>;
};
opp-1920000000 {
opp-hz = /bits/ 64 <1920000000>;
opp-supported-hw = <0x1>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1459200>;
};
opp-1996800000 {
opp-hz = /bits/ 64 <1996800000>;
opp-supported-hw = <0x1>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1593600>;
};
opp-2073600000 {
opp-hz = /bits/ 64 <2073600000>;
opp-supported-hw = <0x1>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1593600>;
};
opp-2150400000 {
opp-hz = /bits/ 64 <2150400000>;
opp-supported-hw = <0x1>;
clock-latency-ns = <200000>;
+ opp-peak-kBps = <1593600>;
};
};
@@ -3550,6 +3600,7 @@ cbf: clock-controller@9a11000 {
reg = <0x09a11000 0x10000>;
clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&apcs_glb>;
#clock-cells = <0>;
+ #interconnect-cells = <1>;
};
intc: interrupt-controller@9bc0000 {
--
2.30.2
