v1 -> v2: - deprecate 'reg', make qcom,rpm-msg-ram required [1/2] - Use devm_ioremap() [2/2] Link to v1: https://lore.kernel.org/r/20230328-topic-msgram_mpm-v1-0-1b788a5f5a33@xxxxxxxxxx Depends on resolution of https://github.com/devicetree-org/dt-schema/issues/104 The MPM (and some other things, irrelevant to this patchset) resides (as far as the ARM cores are concerned, anyway) in a MMIO-mapped region that's a portion of the RPM (low-power management core)'s RAM, known as the RPM Message RAM. Representing this relation in the Device Tree creates some challenges, as one would either have to treat a memory region as a bus, map nodes in a way such that their reg-s would be overlapping, or supply the nodes with a slice of that region. This series implements the third option, by adding a qcom,rpm-msg-ram property, which has been used for some drivers poking into this region before. Bindings ABI compatibility is preserved through keeping the "normal" (a.k.a read the reg property and map that region) way of passing the register space. Example representation with this patchset: / { [...] mpm: interrupt-controller { compatible = "qcom,mpm"; qcom,rpm-msg-ram = <&apss_mpm>; [...] }; [...] soc: soc@0 { [...] rpm_msg_ram: sram@45f0000 { compatible = "qcom,rpm-msg-ram", "mmio-sram"; reg = <0 0x045f0000 0 0x7000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x0 0x045f0000 0x7000>; apss_mpm: sram@1b8 { reg = <0x1b8 0x48>; }; }; }; }; Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> --- Konrad Dybcio (2): dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space .../bindings/interrupt-controller/qcom,mpm.yaml | 12 +++++++++--- drivers/irqchip/irq-qcom-mpm.c | 21 ++++++++++++++++++--- 2 files changed, 27 insertions(+), 6 deletions(-) --- base-commit: 8417c8f5007bf4567ccffda850a3157c7d905f67 change-id: 20230328-topic-msgram_mpm-c688be3bc294 Best regards, -- Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
