On Wed, Apr 05, 2023 at 02:26:42PM +0530, Varadarajan Narayanan wrote: > Add USB phy and controller related nodes > > Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx> > --- > Changes in v6: > - Introduce fixed regulators for the phy > - Resolved all 'make dtbs_check' messages > + usb_0_qmpphy: phy@7d000 { > + compatible = "qcom,ipq9574-qmp-usb3-phy"; > + reg = <0x0007d000 0xa00>; > + #phy-cells = <0>; > + > + clocks = <&gcc GCC_USB0_AUX_CLK>, > + <&xo_board_clk>, > + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, > + <&gcc GCC_USB0_PIPE_CLK>; > + clock-names = "aux", > + "ref", > + "com_aux", Looks like you just ignored my comment that you need to rename this clock (and update the binding). :( https://lore.kernel.org/lkml/ZCaznloORtzgioOP@xxxxxxxxxxxxxxxxxxxx/ > + "pipe"; > + > + resets = <&gcc GCC_USB0_PHY_BCR>, > + <&gcc GCC_USB3PHY_0_PHY_BCR>; > + reset-names = "phy", > + "phy_phy"; > + > + vdda-pll-supply = <®_usb_1p8>; > + vdda-phy-supply = <®_usb_0p925>; > + > + status = "disabled"; > + > + #clock-cells = <0>; > + clock-output-names = "usb0_pipe_clk"; > + };A Johan