On 3/30/23 12:42, Fabio Estevam wrote:
From: Fabio Estevam <festevam@xxxxxxx>
i.MX6SX has a single LVDS port and share a similar LDB_CTRL register layout
with i.MX8MP and i.MX93.
There is no LVDS CTRL register on the i.MX6SX, so only write to
this register on the appropriate SoCs.
Add support for the i.MX6SX LDB.
Tested on a imx6sx-sdb board with a Hannstar HSD100PXN1 LVDS panel
and also on a custom i.MX6SX-based board.
Signed-off-by: Fabio Estevam <festevam@xxxxxxx>
---
Changes since v1:
- None
drivers/gpu/drm/bridge/fsl-ldb.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-ldb.c
index 450b352914f4..f8e5d8ab98e3 100644
--- a/drivers/gpu/drm/bridge/fsl-ldb.c
+++ b/drivers/gpu/drm/bridge/fsl-ldb.c
@@ -56,6 +56,7 @@
#define LVDS_CTRL_VBG_ADJ_MASK GENMASK(19, 17)
enum fsl_ldb_devtype {
+ IMX6SX_LDB,
IMX8MP_LDB,
IMX93_LDB,
};
@@ -64,9 +65,14 @@ struct fsl_ldb_devdata {
u32 ldb_ctrl;
u32 lvds_ctrl;
bool lvds_en_bit;
+ bool not_lvds_ctrl;
You might want to rename this one to something like
"composite_control_reg" since the MX6SX only has one LDB control
register instead of two like the newer SoCs. But that's optional change.
Reviewed-by: Marek Vasut <marex@xxxxxxx>
