On 31/03/2023 14:18, Jack Zhu wrote: > Convert DT bindings document for Cadence MIPI-CSI2 RX controller > to DT schema format. > > Signed-off-by: Jack Zhu <jack.zhu@xxxxxxxxxxxxxxxx> > --- > .../devicetree/bindings/media/cdns,csi2rx.txt | 100 ---------- > .../bindings/media/cdns,csi2rx.yaml | 174 ++++++++++++++++++ > MAINTAINERS | 1 + > 3 files changed, 175 insertions(+), 100 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/media/cdns,csi2rx.txt > create mode 100644 Documentation/devicetree/bindings/media/cdns,csi2rx.yaml > > diff --git a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt > deleted file mode 100644 > index 6b02a0657ad9..000000000000 > --- a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt > +++ /dev/null > @@ -1,100 +0,0 @@ > -Cadence MIPI-CSI2 RX controller > -=============================== > - > -The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI > -lanes in input, and 4 different pixel streams in output. > - > -Required properties: > - - compatible: must be set to "cdns,csi2rx" and an SoC-specific compatible ... > +$id: http://devicetree.org/schemas/media/cdns,csi2rx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Cadence MIPI-CSI2 RX controller > + > +maintainers: > + - Maxime Ripard <mripard@xxxxxxxxxx> > + > +description: > + The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI > + lanes in input, and 4 different pixel streams in output. > + > +properties: > + compatible: > + const: cdns,csi2rx That's not equivalent conversion and your commit msg does no mention any drops in compatibles. > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: CSI2Rx system clock > + - description: Gated Register bank clock for APB interface > + - description: pixel Clock for Stream interface 0 > + - description: pixel Clock for Stream interface 1 > + - description: pixel Clock for Stream interface 2 > + - description: pixel Clock for Stream interface 3 > + Best regards, Krzysztof
