Re: [PATCH v7 4/6] dt-bindings: cache: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller

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Subject: Re: [PATCH v7 4/6] dt-bindings: cache: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller
From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Date: Fri, 31 Mar 2023 11:21:48 +0100
Cc: Arnd Bergmann <arnd@xxxxxxxx>, Geert Uytterhoeven <geert+renesas@xxxxxxxxx>, Heiko Stuebner <heiko@xxxxxxxxx>, Guo Ren <guoren@xxxxxxxxxx>, Andrew Jones <ajones@xxxxxxxxxxxxxxxx>, Paul Walmsley <paul.walmsley@xxxxxxxxxx>, Palmer Dabbelt <palmer@xxxxxxxxxxx>, Albert Ou <aou@xxxxxxxxxxxxxxxxx>, Samuel Holland <samuel@xxxxxxxxxxxx>, <linux-riscv@xxxxxxxxxxxxxxxxxxx>, Rob Herring <robh+dt@xxxxxxxxxx>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>, <devicetree@xxxxxxxxxxxxxxx>, <linux-kernel@xxxxxxxxxxxxxxx>, <linux-renesas-soc@xxxxxxxxxxxxxxx>, Biju Das <biju.das.jz@xxxxxxxxxxxxxx>, Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>, Rob Herring <robh@xxxxxxxxxx>
In-reply-to: <20230330204217.47666-5-prabhakar.mahadev-lad.rj@bp.renesas.com>

$subject: t-bindings: cache: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller
                             ^^^^^^^^^^^^^^^^^^^
I assume this should be updated to be ax45mp-foo instead?

Cheers,
Conor.

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References:
- [PATCH v7 0/6] RISC-V non-coherent function pointer based CMO + non-coherent DMA support for AX45MP
  - From: Prabhakar
- [PATCH v7 4/6] dt-bindings: cache: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller
  - From: Prabhakar

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