On Tue, 2023-03-14 at 10:05 +0100, AngeloGioacchino Del Regno wrote: > Il 09/03/23 14:54, Garmin.Chang ha scritto: > > Add MT8188 peripheral clock controller which provides clock > > gate control for ethernet/flashif/pcie/ssusb. > > > > Signed-off-by: Garmin.Chang <Garmin.Chang@xxxxxxxxxxxx> > > Reviewed-by: Chen-Yu Tsai <wenst@xxxxxxxxxxxx> > > --- > > drivers/clk/mediatek/Makefile | 3 +- > > drivers/clk/mediatek/clk-mt8188-peri_ao.c | 56 > > +++++++++++++++++++++++ > > 2 files changed, 58 insertions(+), 1 deletion(-) > > create mode 100644 drivers/clk/mediatek/clk-mt8188-peri_ao.c > > > > diff --git a/drivers/clk/mediatek/Makefile > > b/drivers/clk/mediatek/Makefile > > index d845bf7308c3..f38a5cea2925 100644 > > --- a/drivers/clk/mediatek/Makefile > > +++ b/drivers/clk/mediatek/Makefile > > @@ -91,7 +91,8 @@ obj-$(CONFIG_COMMON_CLK_MT8186) += clk-mt8186- > > mcu.o clk-mt8186-topckgen.o clk-mt > > clk-mt8186-mfg.o clk-mt8186-mm.o > > clk-mt8186-wpe.o \ > > clk-mt8186-img.o clk-mt8186-vdec.o > > clk-mt8186-venc.o \ > > clk-mt8186-cam.o clk-mt8186-mdp.o > > clk-mt8186-ipe.o > > -obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk- > > mt8188-topckgen.o > > +obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk- > > mt8188-topckgen.o \ > > + clk-mt8188-peri_ao.o > > obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192.o > > obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o > > obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o > > diff --git a/drivers/clk/mediatek/clk-mt8188-peri_ao.c > > b/drivers/clk/mediatek/clk-mt8188-peri_ao.c > > new file mode 100644 > > index 000000000000..683010453a10 > > --- /dev/null > > +++ b/drivers/clk/mediatek/clk-mt8188-peri_ao.c > > @@ -0,0 +1,56 @@ > > +// SPDX-License-Identifier: GPL-2.0-only > > +// > > +// Copyright (c) 2022 MediaTek Inc. > > +// Author: Garmin Chang <garmin.chang@xxxxxxxxxxxx> > > + > > +#include <linux/clk-provider.h> > > +#include <linux/platform_device.h> > > +#include <dt-bindings/clock/mediatek,mt8188-clk.h> > > + > > +#include "clk-gate.h" > > +#include "clk-mtk.h" > > + > > +static const struct mtk_gate_regs peri_ao_cg_regs = { > > + .set_ofs = 0x10, > > + .clr_ofs = 0x14, > > + .sta_ofs = 0x18, > > +}; > > + > > +#define GATE_PERI_AO(_id, _name, _parent, _shift) > > \ > > + GATE_MTK(_id, _name, _parent, &peri_ao_cg_regs, _shift, > > &mtk_clk_gate_ops_setclr) > > + > > +static const struct mtk_gate peri_ao_clks[] = { > > + GATE_PERI_AO(CLK_PERI_AO_ETHERNET, "peri_ao_ethernet", > > "top_axi", 0), > > + GATE_PERI_AO(CLK_PERI_AO_ETHERNET_BUS, "peri_ao_ethernet_bus", > > "top_axi", 1), > > + GATE_PERI_AO(CLK_PERI_AO_FLASHIF_BUS, "peri_ao_flashif_bus", > > "top_axi", 3), > > + GATE_PERI_AO(CLK_PERI_AO_FLASHIF_26M, "peri_ao_flashif_26m", > > "clk26m", 4), > > + GATE_PERI_AO(CLK_PERI_AO_FLASHIFLASHCK, > > "peri_ao_flashiflashck", "top_spinor", 5), > > + GATE_PERI_AO(CLK_PERI_AO_SSUSB_2P_BUS, "peri_ao_ssusb_2p_bus", > > "top_usb_top_2p", 9), > > + GATE_PERI_AO(CLK_PERI_AO_SSUSB_2P_XHCI, > > "peri_ao_ssusb_2p_xhci", "top_ssusb_xhci_2p", 10), > > + GATE_PERI_AO(CLK_PERI_AO_SSUSB_3P_BUS, "peri_ao_ssusb_3p_bus", > > "top_usb_top_3p", 11), > > + GATE_PERI_AO(CLK_PERI_AO_SSUSB_3P_XHCI, > > "peri_ao_ssusb_3p_xhci", "top_ssusb_xhci_3p", 12), > > + GATE_PERI_AO(CLK_PERI_AO_SSUSB_BUS, "peri_ao_ssusb_bus", > > "top_usb_top", 13), > > + GATE_PERI_AO(CLK_PERI_AO_SSUSB_XHCI, "peri_ao_ssusb_xhci", > > "top_ssusb_xhci", 14), > > + GATE_PERI_AO(CLK_PERI_AO_ETHERNET_MAC, > > "peri_ao_ethernet_mac_clk", "top_snps_eth_250m", 16), > > + GATE_PERI_AO(CLK_PERI_AO_PCIE_P0_FMEM, "peri_ao_pcie_p0_fmem", > > "hd_466m_fmem_ck", 24), > > +}; > > + > > +static const struct mtk_clk_desc peri_ao_desc = { > > + .clks = peri_ao_clks, > > + .num_clks = ARRAY_SIZE(peri_ao_clks), > > +}; > > + > > +static const struct of_device_id of_match_clk_mt8188_peri_ao[] = { > > + { .compatible = "mediatek,mt8188-pericfg-ao", .data = > > &peri_ao_desc }, > > + { /* sentinel */ } > > +}; > > MODULE_DEVICE_TABLE is missing > Thank you for your suggestions. Ok, I would modify this in v7. > > + > > +static struct platform_driver clk_mt8188_peri_ao_drv = { > > + .probe = mtk_clk_simple_probe, > > + .remove = mtk_clk_simple_remove, > > + .driver = { > > + .name = "clk-mt8188-peri_ao", > > + .of_match_table = of_match_clk_mt8188_peri_ao, > > + }, > > +}; > > +builtin_platform_driver(clk_mt8188_peri_ao_drv); > > module_platform_driver() > > MODULE_LICENSE