On Thu, Mar 30, 2023 at 09:36:06AM +0200, Krzysztof Kozlowski wrote: > On 29/03/2023 17:39, Cristian Marussi wrote: > > The ARM MHUv2 Receiver block can indeed support more interrupts, up to the > > maximum number of available channels, but anyway no more than the maximum > > number of supported interrupt for an AMBA device. > > > > Signed-off-by: Cristian Marussi <cristian.marussi@xxxxxxx> > > --- > > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx> > > Cc: devicetree@xxxxxxxxxxxxxxx > > > > .../devicetree/bindings/mailbox/arm,mhuv2.yaml | 13 +++++++++---- > > 1 file changed, 9 insertions(+), 4 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml > > index a4f1fe63659a..5a57f4e2a623 100644 > > --- a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml > > +++ b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml > > @@ -69,10 +69,15 @@ properties: > > > > interrupts: > > description: | > > - The MHUv2 controller always implements an interrupt in the "receiver" > > - mode, while the interrupt in the "sender" mode was not available in the > > - version MHUv2.0, but the later versions do have it. > > - maxItems: 1 > > + The MHUv2 controller always implements at least an interrupt in the > > + "receiver" mode, while the interrupt in the "sender" mode was not > > + available in the version MHUv2.0, but the later versions do have it. > > + In "receiver" mode, beside a single combined interrupt, there could be > > + multiple interrupts, up to the number of implemented channels but anyway > > + no more than the maximum number of interrupts potentially supported by > > + AMBA. > Hi, > Last sentence indicates that TX mode has something else, e.g. max 1 > interrupt. Either correct the sentence or add if:then: narrowing it for TX. > By the spec really you can have up to 124 rx interrupt (one per channel) and optionally 124 tx interrupt too. At least one RX is mandatory, while the TX clear channel iterrupt is optional (and not supported at all for spec < 2.1) In both cases you could just have one single combined interrupt, though, and this is what the driver did, and still do (I have noot changed this), on the TX side: it just supports one single combined tx interrupt. So on the TX side, at the HW level, there could be really 124 interrupts BUT the driver still only support a single combined one. So I think my statement above is anyway ambiguos and I'll fix it, but how to fix it, really depends if we want to describe fully what the HW potentially supports OR what the driver really can cope with as of now. Thanks, Cristian
