Quoting Yinbo Zhu (2023-03-22 19:52:29) > This driver provides support for clock controller on Loongson-2 SoC, > the Loongson-2 SoC uses a 100MHz clock as the PLL reference clock, > there are five independent PLLs inside, each of which PLL can > provide up to three sets of frequency dependent clock outputs. > > Signed-off-by: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx> > --- Applied to clk-next
