On Mon, Mar 27, 2023 at 03:41:27PM +0200, Krzysztof Kozlowski wrote: > On 27/03/2023 13:39, Jerome Brunet wrote: > > > > On Mon 27 Mar 2023 at 13:51, Dmitry Rokosov <ddrokosov@xxxxxxxxxxxxxx> wrote: > > > >> On Mon, Mar 27, 2023 at 11:51:21AM +0200, Jerome Brunet wrote: > >>> > >>> On Tue 21 Mar 2023 at 22:30, Dmitry Rokosov <ddrokosov@xxxxxxxxxxxxxx> wrote: > >>> > >>>> Add the documentation for Amlogic A1 PLL and Amlogic A1 Peripherals > >>>> clock drivers. > >>>> Introduce Amlogic A1 PLL and Amlogic A1 Peripherals device tree > >>>> bindings and include them to MAINTAINERS. > >>>> > >>>> Signed-off-by: Jian Hu <jian.hu@xxxxxxxxxxx> > >>>> Signed-off-by: Dmitry Rokosov <ddrokosov@xxxxxxxxxxxxxx> > >>>> --- > >>>> .../bindings/clock/amlogic,a1-clkc.yaml | 73 +++++++++++ > >>>> .../bindings/clock/amlogic,a1-pll-clkc.yaml | 59 +++++++++ > >>>> MAINTAINERS | 1 + > >>>> include/dt-bindings/clock/amlogic,a1-clkc.h | 113 ++++++++++++++++++ > >>>> .../dt-bindings/clock/amlogic,a1-pll-clkc.h | 21 ++++ > >>>> 5 files changed, 267 insertions(+) > >>>> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-clkc.yaml > >>>> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > >>> > >>> There is two drivers (and 2 independent patches). There should be 2 > >>> bindings patches as well. > >>> > >> > >> Before, in previous versions I had two versions, but it wasn't bisectable > >> approach. > > > > You are confusing bisectable and Rob's robot. Splitting patches is more > > that likely to help bisect (and patches backport) - not the other way around. > > No, he did not confuse. Splitting patches makes the series > non-bisectable which was visible in the past. > > What's more, there is no reason to have bindings patches split just > because you split drivers. Bindings are independent of drivers - we > write them for hardware description. > > > > >> a1-clkc schema depends on a1-pll-clkc headers and vice versa. > >> It means dt schemas checkers will show us failure if we split them into two > >> patchsets. > > > > Only because you are patches are not upstream yet ... > > > >> I know, that we can use raw digits instead of CLKID names, but IMO it doesn't > >> look like production schema and it requires one more patchset above the > >> series with proper CLKID definitons usage and proper header including. > >> > >> BTW, there is an example of Rob's test bot failure found in the previous > >> v10 patch series due to chicken or the egg problem. > >> https://lore.kernel.org/all/167769997208.7087.5344356236212731922.robh@xxxxxxxxxx/ > >> > >> Please advise what's the best practice to resolve that.. > > > > Don't use the header in your example would solve the problem and > > still be correct DT wise. > > > > The examples are just examples, they are not required to actually > > matches a real HW, as far as I know. > > Yes, that would work... or just keep them here. I've mentioned it in another reply, by anyway.. Yep, we are able to cheat dt checkers, but we don't help dt developers with such example. From my point of view, it's more clear for DT developer to see direct CLKID points instead of "fake references". May be, it's better to prepare two patches in such hierarchy: 1) A1 PLL clkc bindings with fake references without clkc headers 2) A1 clkc bindings with real CLKID bindings + A1 PLL clkc bindings fix with real CLKID A1 clkc bindings + header. The such approach resolves DT checkers failures and split DT bindings into two patchsets. Also bisectability isn't broken. -- Thank you, Dmitry
