On 22/03/2023 15:34, Frank Li wrote: > > >> -----Original Message----- >> From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> >> Sent: Wednesday, March 22, 2023 2:32 AM >> To: Frank Li <frank.li@nxp. >>> + - const: usb3_aclk >>> + - const: usb3_ipg_clk >>> + - const: usb3_core_pclk >>> + >>> + assigned-clocks: >>> + items: >>> + - description: Phandle and clock specifoer of >> IMX_SC_PM_CLK_MST_BUS. >> >> Drop useless pieces so "Phandle and clock specifoer of " and name the >> hardware, not the syntax. >> >>> + >>> + assigned-clock-rates: >>> + items: >>> + - description: Should be in Range 100 - 600 Mhz. >> >> That's better but I still do not understand why do you need it in the >> bindings. You never actually answered this question. > > I am not sure 100% sure the reason. > I think difference system target's axi bus frequency is difference, > And just one time work, needn't software to manage it. > Following other driver's code style may be another reason. That's the reason of heaving it in DTS. But I am asking about bindings. You do understand you define here interface? Best regards, Krzysztof
