Enable sci0 node using dt overlay and disable can{0,1}-stb-hog
nodes in dt overlay as its pins are shared with sci0 pins.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
v3->v4:
* Updated commit header sci0 nodes->sci0 node
* Removed PMOD USBUART reference and connection details as user can connect
anything on that PMOD1 pins.
* Renamed r9a07g043-smarc.dtso->r9a07g043-smarc-pmod.dtso
* Dropped unused header file dt-bindings/gpio/gpio.h
v3:
* New patch
---
arch/arm64/boot/dts/renesas/Makefile | 1 +
.../dts/renesas/r9a07g043-smarc-pmod.dtso | 42 +++++++++++++++++++
2 files changed, 43 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043-smarc-pmod.dtso
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 23b10c03091c..d1f10ae85f9f 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb-kf.dtb
dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc.dtb
+dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc-pmod.dtbo
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043-smarc-pmod.dtso b/arch/arm64/boot/dts/renesas/r9a07g043-smarc-pmod.dtso
new file mode 100644
index 000000000000..b125a1152982
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g043-smarc-pmod.dtso
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZ/{G2UL, Five} SMARC EVK PMOD parts
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ *
+ *
+ * [Connection]
+ *
+ * SMARC EVK
+ * +----------------------------+
+ * |CN7 (PMOD1 PIN HEADER) |
+ * | SCI0_TXD pin7 |
+ * | SCI0_RXD pin8 |
+ * +----------------------------+
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&pinctrl {
+ can0-stb-hog {
+ status = "disabled";
+ };
+
+ can1-stb-hog {
+ status = "disabled";
+ };
+
+ sci0_pins: sci0-pins {
+ pinmux = <RZG2L_PORT_PINMUX(2, 2, 5)>, /* TxD */
+ <RZG2L_PORT_PINMUX(2, 3, 5)>; /* RxD */
+ };
+};
+
+&sci0 {
+ pinctrl-0 = <&sci0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
--
2.25.1
