Re: [PATCH v4] dt-bindings: iommu: renesas, ipmmu-vmsa: Update for R-Car Gen4

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Hi Rob,

On Mon, Mar 20, 2023 at 3:49 PM Rob Herring <robh@xxxxxxxxxx> wrote:
> On Mon, Mar 13, 2023 at 09:40:26PM +0900, Yoshihiro Shimoda wrote:
> > Since R-Car Gen4 does not have the main IPMMU IMSSTR register, update
> > the bindings to drop the interrupt bit number from the
> > renesas,ipmmu-main property.
>
> Wouldn't it be easier to define a value meaning 'no interrupt bit' such
> as 0 or ~0 than having a variable sized property to parse?

(That would be ~0, as 0 is a valid bit number)

In theory: yes.
In practice: it doesn't matter much, as the driver doesn't use the value
anyway. Cfr. its parsing code being reworked in your patch
"[PATCH] iommu: Use of_property_present() for testing DT property presence"
https://lore.kernel.org/all/20230310144709.1542910-1-robh@xxxxxxxxxx

So yes, using ~0 would simplify the bindings, but would complicate
the DTS files (and probably we should introduce a #define instead of
using ~0 or 0xffffffff or some other value).

> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> > [geert: Re-add removed items level, add minItems/maxItems constraints]
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> > ---
> > Changes from v3:
> > https://lore.kernel.org/all/20230209133440.2643228-1-yoshihiro.shimoda.uh@xxxxxxxxxxx/
> >  - Revise the dt-bindings by Geert-san (Thanks a lot!).
> >
> >  .../bindings/iommu/renesas,ipmmu-vmsa.yaml    | 32 ++++++++++++++-----
> >  1 file changed, 24 insertions(+), 8 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml
> > index 72308a4c14e7..be90f68c11d1 100644
> > --- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml
> > +++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml
> > @@ -74,16 +74,16 @@ properties:
> >    renesas,ipmmu-main:
> >      $ref: /schemas/types.yaml#/definitions/phandle-array
> >      items:
> > -      - items:
> > +      - minItems: 1
> > +        items:
> >            - description: phandle to main IPMMU
> > -          - description: the interrupt bit number associated with the particular
> > -              cache IPMMU device. The interrupt bit number needs to match the main
> > -              IPMMU IMSSTR register. Only used by cache IPMMU instances.
> > +          - description:
> > +              The interrupt bit number associated with the particular cache
> > +              IPMMU device. If present, the interrupt bit number needs to match
> > +              the main IPMMU IMSSTR register. Only used by cache IPMMU
> > +              instances.
> >      description:
> > -      Reference to the main IPMMU phandle plus 1 cell. The cell is
> > -      the interrupt bit number associated with the particular cache IPMMU
> > -      device. The interrupt bit number needs to match the main IPMMU IMSSTR
> > -      register. Only used by cache IPMMU instances.
> > +      Reference to the main IPMMU.
> >
> >  required:
> >    - compatible
> > @@ -109,6 +109,22 @@ allOf:
> >        required:
> >          - power-domains
> >
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: renesas,rcar-gen4-ipmmu-vmsa
> > +    then:
> > +      properties:
> > +        renesas,ipmmu-main:
> > +          items:
> > +            - maxItems: 1
> > +    else:
> > +      properties:
> > +        renesas,ipmmu-main:
> > +          items:
> > +            - minItems: 2
> > +

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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