Re: [PATCH v5 4/5] arm64: dts: qcom: sm8450: switch to usb3/dp combo phy

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On 17/03/2023 13:09, Dmitry Baryshkov wrote:
On 17/03/2023 11:12, Neil Armstrong wrote:
The QMP PHY is a USB3/DP combo phy, switch to the newly
documented bindings and register the clocks to the GCC
and DISPCC controllers.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/sm8450.dtsi | 42 +++++++++++++-----------------------
  1 file changed, 15 insertions(+), 27 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 69695eb83897..0b5a151ce138 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -11,6 +11,7 @@
  #include <dt-bindings/dma/qcom-gpi.h>
  #include <dt-bindings/gpio/gpio.h>
  #include <dt-bindings/mailbox/qcom-ipcc.h>
+#include <dt-bindings/phy/phy-qcom-qmp.h>
  #include <dt-bindings/power/qcom-rpmpd.h>
  #include <dt-bindings/interconnect/qcom,sm8450.h>
  #include <dt-bindings/soc/qcom,gpr.h>
@@ -748,7 +749,7 @@ gcc: clock-controller@100000 {
                   <&ufs_mem_phy_lanes 0>,
                   <&ufs_mem_phy_lanes 1>,
                   <&ufs_mem_phy_lanes 2>,
-                 <0>;
+                 <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
              clock-names = "bi_tcxo",
                        "sleep_clk",
                        "pcie_0_pipe_clk",
@@ -2034,37 +2035,24 @@ usb_1_hsphy: phy@88e3000 {
              resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
          };
-        usb_1_qmpphy: phy-wrapper@88e9000 {
-            compatible = "qcom,sm8450-qmp-usb3-phy";
-            reg = <0 0x088e9000 0 0x200>,
-                  <0 0x088e8000 0 0x20>;
-            status = "disabled";
-            #address-cells = <2>;
-            #size-cells = <2>;
-            ranges;
+        usb_1_qmpphy: phy@88e8000 {
+            compatible = "qcom,sm8450-qmp-usb3-dp-phy";
+            reg = <0 0x088e8000 0 0x4000>;

This should be 0x3000 too, like 8350

Ack thx for noticing


              clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
                   <&rpmhcc RPMH_CXO_CLK>,
-                 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
-            clock-names = "aux", "ref_clk_src", "com_aux";
+                 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+                 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+            clock-names = "aux", "ref", "com_aux", "usb3_pipe";
              resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
                   <&gcc GCC_USB3_PHY_PRIM_BCR>;
              reset-names = "phy", "common";
-            usb_1_ssphy: phy@88e9200 {
-                reg = <0 0x088e9200 0 0x200>,
-                      <0 0x088e9400 0 0x200>,
-                      <0 0x088e9c00 0 0x400>,
-                      <0 0x088e9600 0 0x200>,
-                      <0 0x088e9800 0 0x200>,
-                      <0 0x088e9a00 0 0x100>;
-                #phy-cells = <0>;
-                #clock-cells = <0>;
-                clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
-                clock-names = "pipe0";
-                clock-output-names = "usb3_phy_pipe_clk_src";
-            };
+            #clock-cells = <1>;
+            #phy-cells = <1>;
+
+            status = "disabled";
          };
          remoteproc_slpi: remoteproc@2400000 {
@@ -2972,8 +2960,8 @@ dispcc: clock-controller@af00000 {
                   <&mdss_dsi0_phy 1>,
                   <&mdss_dsi1_phy 0>,
                   <&mdss_dsi1_phy 1>,
-                 <0>, /* dp0 */
-                 <0>,
+                 <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+                 <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
                   <0>, /* dp1 */
                   <0>,
                   <0>, /* dp2 */
@@ -4168,7 +4156,7 @@ usb_1_dwc3: usb@a600000 {
                  iommus = <&apps_smmu 0x0 0x0>;
                  snps,dis_u2_susphy_quirk;
                  snps,dis_enblslpm_quirk;
-                phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
+                phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
                  phy-names = "usb2-phy", "usb3-phy";
              };
          };






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