On Tue, 14 Mar 2023 15:34:26 +0100, Philipp Zabel wrote:
> On Sa, 2023-03-11 at 17:07 +0800, Hal Feng wrote:
>> From: Emil Renner Berthing <kernel@xxxxxxxx>
>>
>> This moves the StarFive JH7100 reset driver to a new subdirectory in
>> preparation for adding more StarFive reset drivers.
>>
>> Tested-by: Tommaso Merciai <tomm.merciai@xxxxxxxxx>
>> Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>> Signed-off-by: Emil Renner Berthing <kernel@xxxxxxxx>
>> Signed-off-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
>> ---
>> MAINTAINERS | 2 +-
>> drivers/reset/Kconfig | 8 +-------
>> drivers/reset/Makefile | 2 +-
>> drivers/reset/starfive/Kconfig | 8 ++++++++
>> drivers/reset/starfive/Makefile | 2 ++
>> drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0
>> 6 files changed, 13 insertions(+), 9 deletions(-)
>> create mode 100644 drivers/reset/starfive/Kconfig
>> create mode 100644 drivers/reset/starfive/Makefile
>> rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index caba3b61ad5c..87f210e357ca 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -19940,7 +19940,7 @@ STARFIVE JH7100 RESET CONTROLLER DRIVER
>> M: Emil Renner Berthing <kernel@xxxxxxxx>
>> S: Maintained
>> F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
>> -F: drivers/reset/reset-starfive-jh7100.c
>> +F: drivers/reset/starfive/reset-starfive-jh7100.c
>> F: include/dt-bindings/reset/starfive-jh7100.h
>>
>>
>>
>>
>> STARFIVE JH71XX PMU CONTROLLER DRIVER
>> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>> index 6ae5aa46a6b2..6aa8f243b30c 100644
>> --- a/drivers/reset/Kconfig
>> +++ b/drivers/reset/Kconfig
>> @@ -232,13 +232,6 @@ config RESET_SOCFPGA
>> This enables the reset driver for the SoCFPGA ARMv7 platforms. This
>> driver gets initialized early during platform init calls.
>>
>>
>>
>>
>> -config RESET_STARFIVE_JH7100
>> - bool "StarFive JH7100 Reset Driver"
>> - depends on ARCH_STARFIVE || COMPILE_TEST
>> - default ARCH_STARFIVE
>> - help
>> - This enables the reset controller driver for the StarFive JH7100 SoC.
>> -
>> config RESET_SUNPLUS
>> bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
>> default ARCH_SUNPLUS
>> @@ -320,6 +313,7 @@ config RESET_ZYNQ
>> help
>> This enables the reset controller driver for Xilinx Zynq SoCs.
>>
>>
>>
>>
>> +source "drivers/reset/starfive/Kconfig"
>> source "drivers/reset/sti/Kconfig"
>> source "drivers/reset/hisilicon/Kconfig"
>> source "drivers/reset/tegra/Kconfig"
>> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
>> index 3e7e5fd633a8..719b8f6f84bc 100644
>> --- a/drivers/reset/Makefile
>> +++ b/drivers/reset/Makefile
>> @@ -1,6 +1,7 @@
>> # SPDX-License-Identifier: GPL-2.0
>> obj-y += core.o
>> obj-y += hisilicon/
>> +obj-$(CONFIG_ARCH_STARFIVE) += starfive/
>
> This should really be obj-y, otherwise this won't compile with
> COMPILE_TEST=y but ARCH_STARFIVE=n.
>
> With that fixed,
> Reviewed-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
The same problem exists in drivers/clk/Makefile.
Will fix them in the next version. Thank you for your review.
Best regards,
Hal
