On 13/03/2023 23:50, Serge Semin wrote:
> Currently none of the AXI-bus non-boolean DT-properties have constraints
> defined meanwhile they can be specified at least based on the
> corresponding device configs. Let's do that:
> + snps,wr_osr_lm/snps,rd_osr_lmt - maximum number of outstanding AXI-bus
> read/write requests is limited with the IP-core synthesize parameter
> AXI_MAX_{RD,WR}_REQ. DW MAC/GMAC: <= 16, DW Eth QoS: <= 32, DW xGMAC: <=
> 64. The least restrictive constraint is defined since the DT-schema is
> common for all IP-cores.
> + snps,blen - array of the burst lengths supported by the AXI-bus. Values
> are limited by the AXI3/4 bus standard, available AXI/System bus CSR flags
> and the AXI-bus IP-core synthesize config . All DW *MACs support setting
> the burst length within the set: 4, 8, 16, 32, 64, 128, 256. If some burst
> length is unsupported a zero value can be specified instead in the array.
>
> Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
>
> snps,kbbe:
> $ref: /schemas/types.yaml#/definitions/uint32
> @@ -501,6 +507,8 @@ properties:
> this is a vector of supported burst length.
> minItems: 7
> maxItems: 7
> + items:
> + enum: [256, 128, 64, 32, 16, 8, 4, 0]
Increasing order.
Best regards,
Krzysztof
