Quoting Conor Dooley (2023-03-15 01:14:06) > Hey Stephen, > > On Wed, Mar 15, 2023 at 11:44:00AM +0800, Xingyu Wu wrote: > > On 2023/3/15 8:30, Stephen Boyd wrote: > > > Quoting Xingyu Wu (2023-03-14 05:43:53) > > >> This patch serises are to add new partial clock drivers and reset > > >> supports about System-Top-Group(STG), Image-Signal-Process(ISP) > > >> and Video-Output(VOUT) for the StarFive JH7110 RISC-V SoC. > > > > > > What is your merge plan for this series? Did you intend for clk tree to > > > take the majority of patches? We won't take the dts changes through the > > > clk tree. > > FWIW, I've been waiting for the "main" clock/reset series [1] to be ready > to go, before suggesting that I take it (the main series) via the soc > tree. This one is kinda in the same boat, with defines in the dt-binding > headers that are used by both drivers and dts, so splitting the two > doesn't make all that much sense. > > As Xingyu points out below, this series depends on the main one, so if I > was to take that via soc, this one would need to go on top, or be > delayed. > At what point does that become too much to go via soc and some sort of > shared tag become needed? > Platform/SoC maintainers either base their DTS file branch on some branch made in clk repo that has the bindings and drivers they need (clk-starfive probably), or they send a pull request to clk maintainers with the bindings and clk drivers. Or they don't use the #defines in the header files and use raw numbers in the DTS, or they simply apply the patch that just has the #defines in it to their SoC tree and we duplicate the commit in the history by also applying it to the clk tree. Let's try to keep things simple and not use raw numbers. BTW, clk driver code doesn't typically go via soc. Not sure if that's happening but please don't do that.
