On 14/03/2023 10:23, Jim Liu wrote:
> Add the SGPIO controller to the NPCM7xx devicetree
>
> Signed-off-by: Jim Liu <jim.t90615@xxxxxxxxx>
> ---
> Changes for v5:
> - remove npcm8xx node
> Changes for v4:
> - add npcm8xx gpio node
> Changes for v3:
> - modify node name
> - modify in/out property name
> Changes for v2:
> - modify dts node
> ---
> arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 30 +++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> index c7b5ef15b716..7f53774a01ec 100644
> --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> @@ -330,6 +330,36 @@
> status = "disabled";
> };
>
> + gpio8: gpio@101000 {
> + compatible = "nuvoton,npcm750-sgpio";
> + reg = <0x101000 0x200>;
> + clocks = <&clk NPCM7XX_CLK_APB3>;
> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + bus-frequency = <8000000>;
Does not look like you tested the bindings. Please run `make
dt_binding_check` (see
Documentation/devicetree/bindings/writing-schema.rst for instructions).
> + gpio-controller;
> + #gpio-cells = <2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&iox1_pins>;
> + nuvoton,input-ngpios = <64>;
> + nuvoton,output-ngpios = <64>;
> + status = "disabled";
> + };
> +
> + gpio9: gpio@102000 {
> + compatible = "nuvoton,npcm750-sgpio";
> + reg = <0x102000 0x200>;
> + clocks = <&clk NPCM7XX_CLK_APB3>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + bus-frequency = <8000000>;
Does not look like you tested the bindings. Please run `make
dt_binding_check` (see
Documentation/devicetree/bindings/writing-schema.rst for instructions).
Best regards,
Krzysztof
