Re: [PATCH v13 2/2] clk: clk-loongson2: add clock controller driver support

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在 2023/3/14 上午2:20, Stephen Boyd 写道:
Quoting Krzysztof Kozlowski (2023-03-10 00:42:47)
On 10/03/2023 00:47, Stephen Boyd wrote:
Quoting zhuyinbo (2023-03-08 18:58:02)
在 2023/3/8 下午8:16, kernel test robot 写道:
Hi Yinbo,

[...]
     drivers/clk/clk-loongson2.c: In function 'loongson2_calc_pll_rate':
drivers/clk/clk-loongson2.c:79:15: error: implicit declaration of function 'readq'; did you mean 'readl'? [-Werror=implicit-function-declaration]
        79 |         val = readq(loongson2_pll_base + offset);
           |               ^~~~~
           |               readl
     cc1: some warnings being treated as errors
The CONFIG_64BIT not enabled in your config file, I will add a depend on
"CONFIG_64BIT" in my clock driver to fix this compile error.
Do you need to use readq() here? Can you read two 32-bit registers with
readl() and put them together for a 64-bit number?
If the platform supports 64-bit reads and these are actually one
register, then readq makes sense - code is more readable, smaller, more
efficient.

Please read the section in Documentation/driver-api/device-io.rst about
hi_lo_readq() and <linux/io-64-nonatomic-lo-hi.h>. We shouldn't need to
restrict the driver to CONFIG_64BIT. Instead, include one of these
header files to get the IO access primitives.

okay, I got it.

Thanks your advice!




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